Bøger i Analog Circuits and Signal Processing serien

With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods.In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurementsfrom the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology.

This book investigates the possible circuit solutions to overcome the temperature and supply voltage-sensitivity of fully-integrated time references for ultra-low-power communication in wireless sensor networks. The authors provide an elaborate theoretical introduction and literature study to enable full understanding of the design challenges and shortcomings of current oscillator implementations. Furthermore, a closer look to the short-term as well as the long-term frequency stability of integrated oscillators is taken. Next, a design strategy is developed and applied to 5 different oscillator topologies and 1 sensor interface. All 6 implementations are subject to an elaborate study of frequency stability, phase noise and power consumption. In the final chapter all blocks are compared to the state of the art.

This book presents a wide-band and technology independent, SPICE-compatible RLC model for through-silicon vias (TSVs) in 3D integrated circuits. This model accounts for a variety of effects, including skin effect, depletion capacitance and nearby contact effects. Readers will benefit from in-depth coverage of concepts and technology such as 3D integration, Macro modeling, dimensional analysis and compact modeling, as well as closed form equations for the through silicon via parasitics. Concepts covered are demonstrated by using TSVs in applications such as a spiral inductor and inductive-based communication system and bandpass filtering.

In "The gm/ID Methodology, a Sizing Tool for Low-Voltage Analog CMOS Circuits", we compare the semi-empirical to the compact model approach. Small numbers of parameters make the compact model attractive for the model paves the way towards analytic expressions unaffordable otherwise. The E.K.V model is a good candidate, but when it comes to short channel devices, compact models are either inaccurate or loose straightforwardness. Because sizing requires basically a reliable large signal representation of MOS transistors, we investigate the potential of the E.K.V model when its parameters are supposed to be bias dependent. The model-driven and semi-empirical methods are compared considering the Intrinsic Gain Stage and a few more complex circuits. A series of MATLAB files found on extras-springer.com allow redoing the tests.

This book discusses new possibilities and trends in analog circuit design, including applications in communication, measurement and RF systems.  The authors combine the main features for circuit design with actual circuit realizations and demonstrate several performance limitations with example circuits.

This book introduces power amplifier design in 22nm FDSOI CMOS dedicated towards 5G applications at 28 GHz and presents 4 state-of-the-art power amplifier designs. The authors discuss power amplifier performance metrics, design trade-offs, and presents different power amplifier classes utilizing efficiency enhancement techniques at 28 GHz.

This book describes new circuits and systems for implantable wireless neural monitoring systems and explains the design of a batteryless, remotely-powered implantable micro-system, designed for continuous neural monitoring.

This book provides design-oriented models for the implementation of ultra-low-voltage energy harvesting converters, covering the modeling of building blocks such oscillators, rectifiers, charge pumps and inductor-based converters that can operate with very low supply voltages, typically under 100 mV. Analyses based on the diode and MOSFET models are included in the text to allow the operation of energy harvesters from voltages of the order of 100 mV or much less, with satisfactory power efficiency. The practical realization of different converters is also addressed, clarifying the design trade-offs of ultra-low voltage (ULV) circuits operating from few millivolts.Offers readers a state-of-the-art revision for ultra-low voltage (ULV) energy harvesting converters;Provides analog IC designers with proper models for the implementation of circuits and building blocks of energy harvesters, such as oscillators, rectifiers, and inductor-based converters, operating under ultra-low voltages;Addresses the design of energy harvesters operating from ultra-low voltages, enabling autonomous operation of connected devices driven by human energy;Demonstrates design and implementation of integrated ULV up-converters;Includes semiconductor modeling for ULV operation.

This book tackles the challenges of designing mm-wave circuits in 16nm FinFET, from the elementary transistor level to a measured D-band transmitter. The design of crucial building blocks such as oscillators and power amplifiers are covered through theoretical limitations, design methodology and measurement.Offers first book on design of mm-wave circuits above 100GHz in an advanced 16nm FinFET digital technology;Covers fundamentals of transistor layout, circuit implementation and measurements;Provides single-source reference to information otherwise only available in disparate literature.