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  • af Piet Wambacq
    3.632,95 - 3.641,95 kr.

    The analysis and prediction of nonlinear behavior in electronic circuits has long been a topic of concern for analog circuit designers. The recent explosion of interest in portable electronics such as cellular telephones, cordless telephones and other applications has served to reinforce the importance of these issues. The need now often arises to predict and optimize the distortion performance of diverse electronic circuit configurations operating in the gigahertz frequency range, where nonlinear reactive effects often dominate. However, there have historically been few sources available from which design engineers could obtain information on analysis tech- niques suitable for tackling these important problems. I am sure that the analog circuit design community will thus welcome this work by Dr. Wambacq and Professor Sansen as a major contribution to the analog circuit design literature in the area of distortion analysis of electronic circuits. I am personally looking forward to hav- ing a copy readily available for reference when designing integrated circuits for communication systems.

  • af Scott A. Vanstone & Paul C. van Oorschot
    422,95 - 452,95 kr.

  • af M. T. Rosetta
    878,95 kr.

  • af Johan Huijsing & Gert Van Der Horn
    1.304,95 kr.

  • af Kenneth S. Kundert, Jacob K. White & Alberto L. Sangiovanni-Vincentelli
    2.352,95 kr.

  • af J. Craninckx
    1.304,95 kr.

    The recent boom in the mobile telecommunication market has trapped the interest of almost all electronic and communication companies worldwide. New applications arise every day, more and more countries are covered by digital cellular systems and the competition between the several providers has caused prices to drop rapidly. The creation of this essentially new market would not have been possible without the ap- pearance of smalI, low-power, high-performant and certainly low-cost mobile termi- nals. The evolution in microelectronics has played a dominant role in this by creating digital signal processing (DSP) chips with more and more computing power and com- bining the discrete components of the RF front-end on a few ICs. This work is situated in this last area, i. e. the study of the full integration of the RF transceiver on a single die. Furthermore, in order to be compatible with the digital processing technology, a standard CMOS process without tuning, trimming or post-processing steps must be used. This should flatten the road towards the ultimate goal: the single chip mobile phone. The local oscillator (LO) frequency synthesizer poses some major problems for integration and is the subject of this work. The first, and also the largest, part of this text discusses the design of the Voltage- Controlled Oscillator (VCO). The general phase noise theory of LC-oscillators is pre- sented, and the concept of effective resistance and capacitance is introduced to char- acterize and compare the performance of different LC-tanks.

  • af Jan Crols
    1.304,95 kr.

    The world of wireless communications is changing very rapidly since a few years. The introduction of digital data communication in combination with digital signal process- ing has created the foundation for the development of many new wireless applications. High-quality digital wireless networks for voice communication with global and local coverage, like the GSM and DECT system, are only faint and early examples of the wide variety of wireless applications that will become available in the remainder of this decade. The new evolutions in wireless communications set new requirements for the trans- ceivers (transmitter-receivers). Higher operating frequencies, a lower power consump- tion and a very high degree of integration, are new specifications which ask for design approaches quite different from the classical RF design techniques. The integrata- bility and power consumption reduction of the digital part will further improve with the continued downscaling of technologies. This is however completely different for the analog transceiver front-end, the part which performs the interfacing between the antenna and the digital signal processing. The analog front-end's integratability and power consumption are closely related to the physical limitations of the transceiver topology and not so much to the scaling of the used technology. Chapter 2 gives a detailed study of the level of integration in current transceiver realization and analyzes their limitations. In chapter 3 of this book the complex signal technique for the analysis and synthesis of multi-path receiver and transmitter topologies is introduced.

  • af Peter A. Sandborn
    1.304,95 kr.

    Conceptual Design of Multichip Modules and Systems treats activities which take place at the conceptual and specification level of the design of complex multichip systems. These activities include the formalization of design knowledge (information modeling), tradeoff analysis, partitioning, and decision process capture. All of these functions occur prior to the traditional CAD activities of synthesis and physical design. Inherent in the design of electronic modules are tradeoffs which must be understood before feasible technology, material, process, and partitioning choices can be selected. The lack of a complete set of technology information is an especially serious problem in the packaging and interconnect field since the number of technologies, process, and materials is substantial and selecting optimums is arduous and non-trivial if one truly wants a balance in cost and performance. Numerous tradeoff and design decisions have to be made intelligently and quickly at the beginning of the design cycle before physical design work begins. These critical decisions, made within the first 10% of the total design cycle, ultimately define up to 80% of the final product cost. Conceptual Design of Multichip Modules and Systems lays the groundwork for concurrent estimation level analysis including size, routing, electrical performance, thermal performance, cost, reliability, manufacturability, and testing. It will be useful both as a reference for system designers and as a text for those wishing to gain a perspective on the nature of packaging and interconnect design, concurrent engineering, computer-aided design, and system synthesis.

  • af Paris Christos Kanellakis & Alex Allister Shvartsman
    878,95 kr.

  • af Johan Huijsing & Ron Hogervorst
    1.730,95 kr.

  • af Friedrich O. Huck
    1.304,95 kr.

    not a coincidence, but is the result of a carefully planned time of landing (sun elevation) and lander orientation (sun azimuth). * The picture was started 25 seconds after touchdown and took 15 seconds to acquire. The alternating bright and dark vertical striations at the left side of the image and the fine particles deposited on the footpad at the right side were caused by a turbulent cloud of dust raised by the lander's retrorockets. t *F. O. Huck and S. D. Wall, "e;Image quality prediction: An aid to the Viking Lander imaging investigation on Mars. "e; Appl. Opt. 15, 1748-1766 (1976). tT. A. Mutch, A. B. Binder, F. O. Huck, E. C. Levinthal, S. Liebes, Jr. , E. C. Morris, W. R. Patterson, J. B. Pollack, C. Sagan and G. R. Taylor, "e;The Surface of Mars: The view from the Viking 1 Lander. "e; Science 193, 791-801 (1976). VISUAL COMMUNICATION An Information Theory Approach Chapter 1 Introduction 1. 1 OBJECTIVE l The fundamental problem of communication, as Shannon stated it, is that of reproducing at one point either exactly or approximately a message selected at another point. In the classical model of communication (Fig. 1. 1), the infor- mation source selects a desired message from a set of possible messages which the transmitter changes into the signal that is actually sent over the commu- nication channel to the receiver. The receiver changes this signal back into a message, and hands this message to the destination.

  • af Mohammed Ismail & Ayman Fayed
    878,95 kr.

  • - From Cluster to Grid Computing
    af Péter Kacsuk
    939,95 - 1.730,95 kr.

    Distributed and Parallel Systems: From Cluster to Grid Computing is an edited volume based on DAPSYS 2006, the 6th Austrian-Hungarian Workshop on Distributed and Parallel Systems, which is dedicated to all aspects of distributed and parallel computing. The workshop was held in conjunction with the 2nd Austrian Grid Symposium in Innsbruck, Austria in September 2006.Distributed and Parallel Systems: From Cluster to Grid Computing is designed for a professional audience composed of practitioners and researchers in industry. This book is also suitable for advanced-level students in computer science. 

  • af Michiel Steyaert, Libin Yao & Willy M Sansen
    878,95 kr.

  • af G. Lamperti & Marina Zanella
    452,95 kr.

  • af Johan Huijsing & Ovidiu Bajdechi
    1.304,95 kr.

  • af Urs E. Gattiker
    1.151,95 kr.

  • af Anne van den Bosch
    1.304,95 kr.

    Static and Dynamic Performance Limitations for High Speed D/A Converters discusses the design and implementation of high speed current-steering CMOS digital-to-analog converters. Starting from the definition of the basic specifications for a D/A converter, the elements determining the static and dynamic performance are identified. Different guidelines based on scientific derivations are suggested to optimize this performance. Furthermore, a new closed formula has been derived to account for the influence of the transistor mismatch on the achievable resolution of the current-steering D/A converter. To allow a thorough understanding of the dynamic behavior, a new factor has been introduced. Moreover, the frequency dependency of the output impedance introduces harmonic distortion components which can limit the maximum attainable spurious free dynamic range. Finally, the last part of the book gives an overview on different existing transistor mismatch models and the link with the static performance of the D/A converter.

  • af Arie van Staveren, E. Yildiz, Chris J. M. Verhoeven, mfl.
    1.219,95 - 1.304,95 kr.

  • af Yi Pan & Laurence Tianruo Yang
    1.304,95 kr.

  • af Jan Vandenbussche
    878,95 kr.

    Systematic Design of Analog IP Blocks introduces a design methodology that can help to bridge the productivity gap. Two different types of designs, depending on the design challenge, have been identified: commodity IP and star IP. Each category requires a different approach to boost design productivity. Commodity IP blocks are well suited to be automated in an analog synthesis environment and provided as soft IP. The design knowledge is usually common knowledge, and reuse is high accounting for the setup time needed for the analog library. Star IP still changes as technology evolves and the design cost can only be reduced by following a systematic design approach supported by point tools to relieve the designer from error-prone, repetitive tasks, allowing him/her to focus on new ideas to push the limits of the design.

  • af Keh-La Lin, Armin Kemna & Bedrich J. Hosticka
    1.560,95 kr.

  • af Mikko E. Waltari
    1.730,95 kr.

    For four decades the evolution of integrated circuits has followed Moore's law, according to which the number of transistors per square millimeter of silicon doubles every 18 months. At the same time transistors have become faster, making possible ever-increasing clock rates in digital circuits. This trend seems set to continue for at least another decade without slowing down. Thus, in the near future the processing power of digital circuits will continue to increase at an accelerating pace. For analog circuits the evolution of technology is not as beneficial. Thus, there is a trend to move signal processing functions from the analog domain to the digital one, which, besides allowing for a higher level of accuracy, provides savings in power consumption and silicon area, increases robustness, speeds up the design process, brings flexibility and programmability, and increases the possibilities for design reuse. In many applications the input and output signals of the system are inherently analog, preventing all-digital realizations; at the very least a conversion between analog and digital is needed at the - terfaces. Typically, moving the analog-digital boundary closer to the outside world increases the bit rate across it. In telecommunications systems the trend to boost bit rates is based on - ploying widerbandwidths and a higher signal-to-noise ratio. At the same time radio architectures in many applications are evolving toward software-defined radio, one of the main characteristics of which is the shifting of the anal- digital boundary closer to the antenna.

  • af Erik Bruun & Gunnar Gudnason
    878,95 kr.

  • af Kimmo Koli
    1.304,95 kr.

    CMOS Current Amplifiers; Speed versus Nonlinearity is intended as a current-amplifier cookbook containing an extensive review of different current amplifier topologies realisable with modern CMOS integration technologies. The seldom-discussed issue of high-frequency distortion performance is derived for all reviewed amplifier topologies using as simple and intuitive mathematical methods as possible. The topologies discussed are also useful as building blocks for high-performance voltage-mode amplifiers. So the reader can apply the discussed techniques to both voltage- and current-mode analogue integrated circuit design.For the most popular open-loop current-mode amplifier, the second-generation current-conveyor (CCII), a macro model is derived that, unlike other reported macromodels, can accurately predict the common-mode behaviour in differential applications. Similarly, this model is used to describe the nonidealities of several other current-mode amplifiers. With modern low-voltage CMOS-technologies, the current-mode operational amplifier and the high-gain current-conveyor (CCIIINFINITY perform better than various open-loop current-amplifiers. Similarly, unlike with conventional voltage-mode operational amplifiers, the large-signal settling behaviour of these two amplifier types does not degrade as CMOS-processes are scaled down.This book contains application examples with experimental results in three different fields: instrumentation amplifiers, continuous-time analogue filters and logarithmic amplifiers. The instrumentation amplifier example shows that using unmatched off-the-self components very high CMRR can be reached even at relatively high frequencies. As a filter application, two 1 MHz 3rd-order low-pass continuous-time filters are realised with a 1.2 mum CMOS-process. These filters use a differential CCIIINFINITY with linearised, dynamically biased output stages resulting in outstanding performance when compared to most OTA-C filter realisations reported.As an application example of nonlinear circuits, two logarithmic amplifier chips are designed and fabricated. The first circuit, implemented with a 1.2 m BiCMOS-process, uses again a CCII8 and a pn-junction as a logarithmic feedback element. With a CCII8 the constant gain-bandwidth product, typical of voltage-mode operational amplifiers, is avoided resulting in a constant 1 MHz bandwidth within a 60 dB signal amplitude range. The second current-mode logarithmic amplifier, realised in a 1.2 m CMOS-process, is based on piece-wise linear approximation of the logarithmic function. In this logarithmic amplifier, using limiting current amplifiers instead of limiting voltage amplifiers results in exceptionally low temperature dependency of the logarithmic output signal. Additionally, along with this logarithmic amplifier a new current peak detector is developed.

  • af Federico Bruccoleri
    1.221,95 kr.

    Low Noise Amplifiers (LNAs) are commonly used to amplify signals that are too weak for direct processing for example in radio or cable receivers. Traditionally, low noise amplifiers are implemented via tuned amplifiers, exploiting inductors and capacitors in resonating LC-circuits. This can render very low noise but only in a relatively narrow frequency band close to resonance. There is a clear trend to use more bandwidth for communication, both via cables (e.g. cable TV, internet) and wireless links (e.g. satellite links and Ultra Wideband Band). Hence wideband low-noise amplifier techniques are very much needed.Wideband Low Noise Amplifiers Exploiting Thermal Noise Cancellation explores techniques to realize wideband amplifiers, capable of impedance matching and still achieving a low noise figure well below 3dB. This can be achieved with a new noise cancelling technique as described in this book. By using this technique, the thermal noise of the input transistor of the LNA can be cancelled while the wanted signal is amplified! The book gives a detailed analysis of this technique and presents several new amplifier circuits.This book is directly relevant for IC designers and researchers working on integrated transceivers. Although the focus is on CMOS circuits, the techniques can just as well be applied to other IC technologies, e.g. bipolar and GaAs, and even in discrete component technologies.

  • af Georges Gielen, Piet Vanassche & Willy M Sansen
    1.304,95 kr.

  • af D. M. Walker
    1.304,95 kr.

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