Bøger af Ralf Seepold

System-on-Chip Methodologies & Design Languages brings together a selection of the best papers from three international electronic design language conferences in 2000. The conferences are the Hardware Description Language Conference and Exhibition (HDLCon), held in the Silicon Valley area of USA; the Forum on Design Languages (FDL), held in Europe; and the Asia Pacific Chip Design Language (APChDL) Conference. The papers cover a range of topics, including design methods, specification and modeling languages, tool issues, formal verification, simulation and synthesis. The results presented in these papers will help researchers and practicing engineers keep abreast of developments in this rapidly evolving field.

Reuse Techniques for VLSI Design is a reflection on the current state of the art in design reuse for microelectronic systems. To that end, it is the first book to garner the input of leading experts from both research and application areas. These experts document herein not only their more mature approaches, but also their latest research results. Firstly, it sets out the background and support from international organisations that enforce System-on-a-Chip (SoC) design by reuse- oriented methodologies. This overview is followed by a number of technical presentations covering different requirements of the reuse domain. These are presented from different points of view, i.e., IP provider, IP user, designer, isolated reuse, intra-company or inter-company reuse. More general systems or case studies, e.g., metrics, are followed by comprehensive reuse systems, e.g., reuse management systems partly including business models. Since design reuse must not be restricted to digital components, mixed- signal and analog reuse approaches are also presented. In parallel to the digital domain, this area covers research in reuse database design. Design verification and legal aspects are two important topics that are closely related to the realization of design reuse. These hot topics are covered by presentations that finalize the survey of outstanding research, development and application of design reuse for SoC design. Reuse Techniques for VLSI Design is an invaluable reference for researchers and engineers involved in VLSI/ASIC design.