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This essential reference combines state-of-the-art circuit techniques and statistical methodologies to optimize SRAM performance and yield in nanometer technologies. It shows designers how to apply practical techniques that optimize memory yield.
This excellent survey of state-of-the-art techniques discusses the MTCMOS technology that has emerged as an increasingly popular technique to control the escalating leakage power, while maintaining high performance. It addresses the leakage problem in a number of designs for combinational, sequential, dynamic and current-steering logic.
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