Udvidet returret til d. 31. januar 2025

An Efficient Hardware Architecture for Multimedia Encryption - Gaddam Sunil Kumar - Bog

An Efficient Hardware Architecture for Multimedia Encryptionaf Gaddam Sunil Kumar
Bag om An Efficient Hardware Architecture for Multimedia Encryption

This book introduces a zero-overhead security scheme for real-time embedded digital image processing systems. The Discrete Wavelet Transform (DWT) compression block is constructed using a parameterized approach, introducing a free parameter into the design. To create this parameterized DWT compression block, we utilize a biorthogonal wavelet filter bank. This approach allows for the establishment of a key-space for lightweight multimedia encryption. The parameterization yields rational coefficients, resulting in an efficient fixed-point hardware implementation. Achieving a clock speed of over 244 MHz on a Xilinx Virtex 2P FPGA, this method proves highly effective. A comparison with existing approaches highlights the significant advantages in terms of throughput and hardware overhead when integrating security features into the DWT architecture.

Vis mere
  • Sprog:
  • Engelsk
  • ISBN:
  • 9786206785781
  • Indbinding:
  • Paperback
  • Sideantal:
  • 220
  • Udgivet:
  • 20. september 2023
  • Størrelse:
  • 150x14x220 mm.
  • Vægt:
  • 346 g.
  • 2-3 uger.
  • 6. december 2024
På lager

Normalpris

  • BLACK NOVEMBER

Medlemspris

Prøv i 30 dage for 45 kr.
Herefter fra 79 kr./md. Ingen binding.

Beskrivelse af An Efficient Hardware Architecture for Multimedia Encryption

This book introduces a zero-overhead security scheme for real-time embedded digital image processing systems. The Discrete Wavelet Transform (DWT) compression block is constructed using a parameterized approach, introducing a free parameter into the design. To create this parameterized DWT compression block, we utilize a biorthogonal wavelet filter bank. This approach allows for the establishment of a key-space for lightweight multimedia encryption. The parameterization yields rational coefficients, resulting in an efficient fixed-point hardware implementation. Achieving a clock speed of over 244 MHz on a Xilinx Virtex 2P FPGA, this method proves highly effective. A comparison with existing approaches highlights the significant advantages in terms of throughput and hardware overhead when integrating security features into the DWT architecture.

Brugerbedømmelser af An Efficient Hardware Architecture for Multimedia Encryption



Find lignende bøger
Bogen An Efficient Hardware Architecture for Multimedia Encryption findes i følgende kategorier:

Gør som tusindvis af andre bogelskere

Tilmeld dig nyhedsbrevet og få gode tilbud og inspiration til din næste læsning.